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SUZAKU-S FPGA specifications and FPGA development environment
FPGA Specifications
The following are SUZAKU-S's FPGA specifications. Overall hardware specifications can be found here.
| Model
|
SZ010-U00
|
SZ030-U00
|
| FPGA Device
|
Xilinx Spartan-3 XC3S400-FT256
|
Xilinx Spartan-3 XC3S1000-FT256
|
| CPU Core
|
MicroBlaze (32bit RISC core)
|
| Crystal Oscillator
|
3.6864MHz (frequency multiplied by FPGA's internal DCM)
|
| Serial Port
|
FPGA internal 1ch (OPB UART Lite)
|
| Timer
|
FPGA internal 1ch (OPB Timer)
|
| Configuration
|
TE7720 (Tokyo Electron Device) |
| Default Core Details
|
| Core
|
Version
|
Base address
|
| microblaze
|
2.10.a
|
|
| opb_sdram
|
1.00.c
|
C_BASEADDR 0x80000000
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| opb_uartlite
|
1.00.b
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C_BASEADDR 0xFFFF2000
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| opb_timer
|
1.00.b
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C_BASEADDR 0xFFFF1000
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| lmb_bram_if_cntlr
|
1.00.b
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C_BASEADDR 0x00000000
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| bram_block
|
1.00.a
|
|
| opb_intc
|
1.00.c
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C_BASEADDR 0xFFFF3000
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| opb_v20
|
1.10.b
|
|
| lmb_v10
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1.00.a
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|
| opb_emc
|
1.10.b
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C_BASEADDR 0xFFFF0000
C_HIGHADDR 0xFFFF01FF
C_MEM0_BASEADDR 0xFFE0_0000
C_MEM1_BASEADDR 0xFF00_0000
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| opb_gpio
|
1.00.a
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C_BASEADDR 0xFFFFA000
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| external_int
|
1.00.a
|
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| Default Resource Status - SZ030-U00
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| Resource
|
Used
|
Available
|
Utilization
|
| Number of BUFGMUXs
|
1
|
8
|
12%
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| Number of DCMs
|
1
|
4
|
25%
|
| Number of External IOBs
|
74
|
173
|
42%
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| Number of LOCed IOBs
|
74
|
74
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100%
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| Number of MULT18X18x
|
1
|
8
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25%
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| RAMB16s
|
9
|
24
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37%
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| Number of Slices
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1852
|
7680
|
24%
|
| Number of SLICEMs
|
281
|
33840
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7%
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| Default Resource Status - SZ010-U00
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| Resource
|
Used
|
Available
|
Utilization
|
| Number of BUFGMUXs
|
1
|
8
|
12%
|
| Number of DCMs
|
1
|
4
|
25%
|
| Number of External IOBs
|
74
|
173
|
42%
|
| Number of LOCed IOBs
|
74
|
74
|
100%
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| Number of MULT18X18x
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3
|
16
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18%
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| RAMB16s
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9
|
16
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56%
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| Number of Slices
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1972
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3584
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24%
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| Number of SLICEMs
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288
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1792
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16%
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FPGA Development Environment
FPGA development requires the following software and hardware.
- A computer capable of running ISE and EDK (Windows XP/2000, Solaris or Linux)
- Xilinx Logic Design Tool ISE 6.2i or above
- Xilinx Embedded Development Kit EDK 6.2i or above
- JTAG Cable: Xilinx Parallel Cable 4 or compatible
- FPGA Programming Software (LBPLAYER2 included)
- HDL simulator (ModelSim, Active-HDL etc)
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